Upscale AI Challenges Nvidia’s Scale-Up Dominance with SkyHammer Fabric and $2 Billion Valuation

For decades, the architecture of high-performance computing was defined by a fiercely guarded isolationism. Every major CPU manufacturer developed its own proprietary methods for linking multiple processors into shared memory clusters. Whether through SMP (Symmetric Multiprocessing) or NUMA (Non-Uniform Memory Access) designs, these interconnects were the "secret sauce" that allowed a handful of chips to act as a single, cohesive unit. Despite the noble efforts of industry groups like the CCIX consortium and the more recent CXL (Compute Express Link) consortium to create a universal "glue" for silicon, the dream of a vendor-neutral, high-performance interconnect has largely remained elusive.

The failure to establish a truly universal CPU standard stemmed from a simple market reality: customers rarely had a reason to mix and match different CPU architectures within a single shared memory domain. Furthermore, proprietary designs allowed vendors to innovate on their own schedules. They could refine their SMP and NUMA chipsets—which were eventually integrated directly into the silicon—at a pace independent of core designs or I/O advancements. Most importantly, being untethered from a standards body meant they could differentiate their products exactly as they saw fit, maintaining a competitive moat that was difficult for rivals to cross.

However, as the industry pivots from general-purpose CPU computing to the era of massive AI clusters, the conversation around interconnects is shifting. The industry is now searching for a standard version of what is effectively a NUMA interconnect for GPUs and XPUs—what the industry has rebranded as "scale-up networking." This renewed interest in standardization is driven by the fundamental economic law of substitution and a desperate market desire for competition to drive down the astronomical costs of AI infrastructure.

At the center of this tension is Nvidia. The company currently commands a significant premium for its proprietary NVSwitch and NVLink ports. These technologies provide the unparalleled bandwidth and low latency required to bind as many as 72 GPUs into a single shared memory system, which Nvidia markets as the NVL72 rackscale machine. While Nvidia has made some concessions through its NVLink Fusion initiative—allowing custom CPU and XPU makers to add NVLink ports to their devices—it remains a tightly controlled ecosystem. Currently, Nvidia does not allow customers to combine their own CPUs and XPUs using NVSwitches and licensed NVLink protocols to build independent shared memory systems.

The industry’s hope is that an alternative will eventually emerge to challenge this lock-in. This is why Upscale AI has become one of the most watched startups in the semiconductor and networking space. Since its initial $200 million Series A funding round in January, the company has seen its momentum accelerate. Upscale AI has now raised a total of $500 million, seeing its valuation double to $2 billion. Its workforce has also expanded rapidly, now exceeding 300 employees as it prepares to challenge the status quo of AI networking.

This week, the leadership at Upscale AI provided a clearer look at their strategy for both scale-up and scale-out networking. Led by co-founder and executive chairman Rajiv Khemani and CEO Barun Kar—both veterans with deep roots in high-performance systems—the company is positioning its "SkyHammer" ASIC as the cornerstone of a new, more open AI fabric.

While specific "speeds and feeds" for the SkyHammer ASIC remain somewhat guarded, the technical details that have emerged suggest a formidable piece of hardware. SkyHammer is reported to have an aggregate bandwidth of 115.2 Tb/sec. This figure places it on equal footing with the state-of-the-art scale-out network ASICs currently offered by industry giants like Broadcom, Cisco, and Nvidia. Furthermore, the company’s SkyFabriX architecture is designed to eventually support switch gear with aggregate bandwidth measuring in the multiple petabits per second.