Upscale AI Challenges Nvidia’s Dominance with SkyHammer Scale-Up Fabric

The centerpiece of Upscale AI’s strategy is the "SkyHammer" scale-up switch ASIC. While the company has been cautious with specific "speeds and feeds," recent disclosures provide a glimpse into the raw power of the silicon. SkyHammer boasts an aggregate bandwidth of 115.2 terabits per second (Tb/sec), a figure that puts it on equal footing with the most advanced scale-out network ASICs currently offered by industry titans like Broadcom, Cisco Systems, and Nvidia itself. Furthermore, the SkyFabriX architecture supported by these chips is designed to eventually reach aggregate bandwidths measured in multiple petabits per second.

Achieving this level of performance typically requires ganging multiple ASICs together within a single switch chassis. This is a common practice among vendors like Broadcom and Meta, where a two-tier internal network is created using multiple independent ASICs to effectively double the port bandwidth. While this approach can increase latency for certain port hops, it offers a cost-effective way to scale performance without waiting for the next generation of single-chip designs. Upscale AI appears to be following a similar economic logic, aiming to deliver high-density connectivity that balances performance with the practicalities of street pricing and manufacturing costs.

In terms of scalability, the SkyHammer architecture is designed to support up to 576 accelerators within a single networking tier. By utilizing multiple tiers, the company claims the fabric can scale to "thousands of accelerators," likely targeting benchmarks such as 1,024 or 1,156 units. This puts SkyHammer in direct competition with the UALink consortium, which is currently promising support for 1,024 XPUs in a single tier. For comparison, Nvidia’s upcoming "Rubin Ultra" generation is expected to push NVSwitch limits to 1,152 GPUs through multi-tier configurations, though its current production focus remains on the 72-GPU domain.

When analyzing the raw bandwidth math, SkyHammer presents an interesting trade-off. At 576 devices, each accelerator receives approximately 200 Gb/sec of bandwidth. This is significantly lower than the 1.8 TB/sec offered by Nvidia’s NVLink 5 on Grace-Blackwell systems, or the projected 3.6 TB/sec for the Vera-Rubin generation. Even at a smaller scale of 72 XPUs, SkyHammer delivers roughly 1.6 Tb/sec per port, which translates to 200 GB/sec of memory bandwidth—about one-sixth of the throughput of the current NVSwitch 5 stack.

However, Upscale AI argues that for many AI workloads, particularly inference, sheer bandwidth is not the only metric that matters. Arvind Srikumar, Senior Vice President of Product and Marketing at Upscale AI, emphasizes that predictable latency and jitter are the true keys to performance in the token-generation phase of AI models.

"With AI, the latency has to be super predictable, and we have built into the ASIC predictable jitter," Srikumar explained. He noted that while standard protocols provide link-level reliability, Upscale AI has developed internal mechanisms to ensure the fabric remains 100 percent lossless. By starting with a "clean sheet of paper" rather than retrofitting existing Ethernet protocols, the company believes it can offer a level of parallelism and reliability that traditional Ethernet fabrics lack.