Upscale AI Challenges Nvidia’s Dominance with SkyHammer Scale-Up Fabric and Unified AI Networking

The history of the semiconductor industry is littered with the remains of ambitious attempts to create universal standards for interconnecting processors. For decades, every major CPU manufacturer maintained a fiercely proprietary method for linking multiple chips into shared memory clusters. Whether it was the specialized bus architectures of the mainframe era or the more modern non-uniform memory access (NUMA) and symmetric multiprocessing (SMP) designs of the x86 and RISC revolutions, the "glue" that made several CPUs behave as one large, cohesive unit was almost always a trade secret.

Despite the noble efforts of organizations like the CCIX and CXL consortia to forge a universal interconnect, the dream of a vendor-neutral, high-performance fabric for CPUs largely failed to gain traction. The reasons were pragmatic rather than technical. Customers rarely had a genuine need to mix and match CPU architectures from different vendors within a single shared-memory domain. Furthermore, proprietary chipsets allowed vendors to innovate at their own pace, decoupled from the slower, committee-driven cycles of standards bodies. By embedding these interconnects directly into the silicon, vendors could differentiate their products and maintain a tight grip on their ecosystems.

However, as the center of gravity in the data center shifts from general-purpose CPUs to massive clusters of GPUs and specialized AI accelerators (XPUs), the industry is witnessing a renewed, more desperate push for a standard scale-up interconnect. This time, the stakes are higher, driven by the astronomical costs of AI infrastructure and the market’s inherent desire for competition and substitution.

Nvidia currently sits at the apex of this market, commanding a significant premium for its proprietary NVSwitch and NVLink technologies. These components provide the unparalleled bandwidth and low latency required to stitch together as many as 72 GPUs into a single, massive shared-memory machine, such as the NVL72 rackscale system. While Nvidia has recently shown a willingness to license NVLink memory ports to custom CPU and XPU makers through its "NVLink Fusion" initiative, it remains a controlled ecosystem. Hyperscalers and AI model builders can gain entry into Nvidia’s rackscale architecture, but they must still play by Nvidia’s rules and buy Nvidia’s switches.

This environment has created a massive opening for challengers. Among the most prominent is Upscale AI, a startup that has rapidly scaled its operations and funding to tackle the dominance of proprietary AI fabrics. Since early this year, the company has seen its valuation double to $2 billion, raising a total of $500 million to date. With a workforce that has swelled to over 300 employees, the company’s leadership—comprised of industry veterans with deep roots in high-performance networking—has begun to pull back the curtain on its "SkyHammer" scale-up switch ASIC and its broader "SkyFabriX" architecture.

The SkyHammer ASIC represents a "clean sheet" approach to the problem of AI networking. Unlike traditional Ethernet switches that have been retrofitted for AI workloads, SkyHammer was designed from the ground up to handle the unique demands of scale-up fabrics. During a recent reveal, the company disclosed that the SkyHammer ASIC boasts an aggregate bandwidth of 115.2 Tb/sec. This figure places the chip on equal footing with the most advanced scale-out network ASICs currently offered by industry giants like Broadcom, Cisco, and Nvidia.