The history of the semiconductor industry is littered with the remains of ambitious attempts to create universal standards for interconnecting processors. For decades, every major CPU manufacturer maintained a fiercely proprietary method for linking multiple chips into shared memory clusters. Whether it was the specialized bus architectures of the mainframe era or the more modern non-uniform memory access (NUMA) and symmetric multiprocessing (SMP) designs of the x86 and RISC revolutions, the "glue" that made several CPUs behave as one large, cohesive unit was almost always a trade secret.
Despite the noble efforts of organizations like the CCIX and CXL consortia to forge a universal interconnect, the dream of a vendor-neutral, high-performance fabric for CPUs largely failed to gain traction. The reasons were pragmatic rather than technical. Customers rarely had a genuine need to mix and match CPU architectures from different vendors within a single shared-memory domain. Furthermore, proprietary chipsets allowed vendors to innovate at their own pace, decoupled from the slower, committee-driven cycles of standards bodies. By embedding these interconnects directly into the silicon, vendors could differentiate their products and maintain a tight grip on their ecosystems.
However, as the center of gravity in the data center shifts from general-purpose CPUs to massive clusters of GPUs and specialized AI accelerators (XPUs), the industry is witnessing a renewed, more desperate push for a standard scale-up interconnect. This time, the stakes are higher, driven by the astronomical costs of AI infrastructure and the market’s inherent desire for competition and substitution.
Nvidia currently sits at the apex of this market, commanding a significant premium for its proprietary NVSwitch and NVLink technologies. These components provide the unparalleled bandwidth and low latency required to stitch together as many as 72 GPUs into a single, massive shared-memory machine, such as the NVL72 rackscale system. While Nvidia has recently shown a willingness to license NVLink memory ports to custom CPU and XPU makers through its "NVLink Fusion" initiative, it remains a controlled ecosystem. Hyperscalers and AI model builders can gain entry into Nvidia’s rackscale architecture, but they must still play by Nvidia’s rules and buy Nvidia’s switches.
This environment has created a massive opening for challengers. Among the most prominent is Upscale AI, a startup that has rapidly scaled its operations and funding to tackle the dominance of proprietary AI fabrics. Since early this year, the company has seen its valuation double to $2 billion, raising a total of $500 million to date. With a workforce that has swelled to over 300 employees, the company’s leadership—comprised of industry veterans with deep roots in high-performance networking—has begun to pull back the curtain on its "SkyHammer" scale-up switch ASIC and its broader "SkyFabriX" architecture.

The SkyHammer ASIC represents a "clean sheet" approach to the problem of AI networking. Unlike traditional Ethernet switches that have been retrofitted for AI workloads, SkyHammer was designed from the ground up to handle the unique demands of scale-up fabrics. During a recent reveal, the company disclosed that the SkyHammer ASIC boasts an aggregate bandwidth of 115.2 Tb/sec. This figure places the chip on equal footing with the most advanced scale-out network ASICs currently offered by industry giants like Broadcom, Cisco, and Nvidia.
The SkyFabriX architecture is designed to scale significantly. While a single networking tier can support up to 576 accelerators, the use of multiple tiers could allow the fabric to scale to thousands of devices. In the current landscape, these numbers are competitive. The emerging UALink consortium is aiming for 1,024 XPUs in a single tier, and Nvidia’s future "Rubin Ultra" generation is expected to push NVSwitch boundaries to 1,152 GPUs using multi-tier configurations.
However, the raw bandwidth numbers tell only part of the story. When calculating the bandwidth per device, SkyHammer appears to offer significantly less throughput than Nvidia’s latest generations. On a Grace-Blackwell NVL72 system, NVLink 5 provides approximately 1.8 TB/sec per GPU, a figure set to double with the upcoming Vera-Rubin generation. In contrast, SkyHammer’s current specifications suggest a more modest memory bandwidth over the scale-up network.
Upscale AI contends that bandwidth is not the only metric that matters, particularly for AI inference workloads where latency and, more importantly, predictable jitter are the critical factors. In the world of large language models, the speed at which tokens are generated is heavily dependent on the reliability and consistency of the network fabric. The SkyHammer ASIC incorporates specific mechanisms to ensure a 100 percent lossless fabric with minimized and predictable latency. By avoiding the rigid, less-parallel pipeline arrangements of traditional Ethernet fabrics, Upscale AI believes it can offer a performance profile that challenges proprietary alternatives.
Technically, SkyHammer is an Ethernet-based ASIC, but it is one that has been heavily optimized for specialized protocols. It supports UALoE (UALink over Ethernet) and the ESUN memory protocols. This choice reflects a broader industry trend where the ubiquity and cost-effectiveness of Ethernet are being harnessed to perform tasks once reserved for specialized, low-latency technologies like InfiniBand.
While SkyHammer targets the scale-up portion of the AI cluster—the high-speed connections within a rack or a group of accelerators sharing memory—Upscale AI is not ignoring the scale-out portion of the network. In a strategic move, the company has partnered with Nvidia to use Spectrum-X Ethernet ASICs for its scale-out fabrics. Upscale AI will build its own switches based on these ASICs, which support port speeds of 400 Gb/sec, 800 Gb/sec, and 1.6 Tb/sec.

The bridge between these two worlds is "SkyOS," the company’s network operating system. SkyOS is an AI-optimized evolution of SONiC (Software for Open Networking in the Cloud), the open-source operating system originally developed by Microsoft that has since become a standard in hyperscale data centers. By running SkyOS across both SkyHammer (scale-up) and Spectrum-X (scale-out) hardware, Upscale AI offers a unified management and orchestration layer. Their "SkyCMD" tool provides telemetry and control over the entire cluster as a single entity, regardless of whether the traffic is moving within a memory domain or across the broader data center network.
This unified approach addresses a major pain point for data center operators: the complexity of managing disparate networking technologies. The ability to use any CPU, GPU, or XPU, fronted by standard NICs or DPUs, and have them all participate in a single, manageable fabric is a compelling value proposition. It offers a level of flexibility that is currently difficult to achieve within the "walled garden" of proprietary AI stacks.
However, the path forward is not without significant hurdles. While companies like AMD are likely to embrace third-party scale-up options like SkyHammer to bolster their own AI offerings, Nvidia has little incentive to support an alternative to its lucrative NVSwitch ecosystem. Currently, there is no supported way to use Nvidia GPUs within a SkyHammer-based scale-up domain.
The industry is now entering a period of intense experimentation. As organizations begin to deploy UALoE and ESUN protocols over optimized Ethernet switches, the market will finally see if a standardized approach can truly match the performance of a vertically integrated, proprietary solution.
The outcome of this battle will likely determine the economic landscape of AI for the next decade. If Upscale AI and the broader standards movements succeed, the cost of building massive AI clusters could drop significantly as competition enters the interconnect market. If proprietary systems maintain their performance lead, the "tax" on high-end AI compute will remain high.
In the long run, even a dominant player like Nvidia might be forced to adapt. If a standard scale-up network reaches a certain level of maturity and market share, particularly for inference workloads, Nvidia could eventually choose to adopt the standard while layering its own proprietary protocol enhancements on top. Until then, the industry will watch closely to see if SkyHammer can truly break the proprietary "glue" that has held the high-performance computing world together for so long.
