October 16, 2026

Quantum Elements Bridges the Hardware-Software Gap in Quest for Fault-Tolerant Computing

Breaking the Grid: A New Approach to Error Correction

The true power of the Orbit tool and the broader Quantum Elements philosophy was recently put to the test in a collaborative research project with the University of Southern California (USC). The results of this study, published this month in the journal Nature, address one of the most persistent bottlenecks in quantum architecture: the relationship between the "surface code" and the physical layout of the QPU.

The surface code is widely considered the most practical avenue for achieving large-scale, fault-tolerant quantum computing. It functions as a topological quantum error-correction code, typically envisioned as being laid out in a two-dimensional grid. For years, the prevailing wisdom suggested that to run the surface code efficiently, a quantum chip needed to physically mirror that 2D grid connectivity.

However, the research conducted by Quantum Elements and USC proves that the surface code can scale effectively even when used with a QPU that does not share a similar grid-like layout. This finding has profound implications for how quantum computers are designed. It suggests that engineers no longer need to be "hemmed in" by the requirement to match a chip’s physical layout to the specific structure of the error-correction code.

Medalsy characterized the research as a demonstration of the power of hybrid approaches. By showing that error-correction codes can be mapped onto diverse hardware topologies, the study provides engineers with much-needed "breathing room" in the design process.

The Challenge of the Heavy-Hex Lattice

The research specifically utilized the "heavy-hex" architecture found in IBM’s Heron quantum processor. First released in 2023 and currently deployed in IBM System Two and upgraded System One units, the Heron processor comes in configurations of 133 and 156 qubits.

Improving Quantum Error Correction By Meshing Surface Code With IBM’s Heavy-Hex Architecture

The heavy-hex layout is a hexagonal, honeycomb-like lattice. IBM chose this architecture for several practical reasons: it prevents crowded connections and reduces "collisions" between neighboring qubits. In quantum hardware, frequency crowding and crosstalk are significant issues; if qubits are packed too tightly in a square grid, the signals used to control one qubit can inadvertently affect its neighbor. The hexagonal layout eases these constraints and simplifies the lithographic fabrication process, making thermal management more manageable.

The problem, however, is that a hexagonal lattice has lower connectivity than a traditional square grid. When mapping a 2D surface code onto a heavy-hex lattice, the reduced connectivity can lead to delays. Moving a quantum state between non-neighboring qubits requires "routing," which takes time. During this "idle time," qubits are exposed to environmental noise, which can cause them to lose their quantum nature (decoherence). As the code scales up, these errors can accumulate, potentially negating the benefits of the error correction itself.

Engineering the Hybrid Solution

To overcome the mismatch between the surface code and the heavy-hex architecture, the researchers employed several strategic technical decisions.