Upscale AI Unveils SkyHammer Architecture to Challenge Nvidia’s Scale-Up Networking Monopoly

In the history of the semiconductor industry, the desire for a "universal glue"—a standardized interconnect that allows multiple processors to function as a single, massive compute entity—has been a recurring theme. Historically, every major CPU manufacturer maintained its own proprietary methods for linking processors into shared memory clusters. Despite the valiant efforts of organizations like the CCIX consortium and the CXL consortium to create an industry-wide standard, the world of high-performance computing (HPC) remained largely fragmented into proprietary silos.

The failure to establish a universal standard for Symmetric Multiprocessing (SMP) and Non-Uniform Memory Access (NUMA) was not due to a lack of engineering talent, but rather a lack of market alignment. Customers may have desired the flexibility to mix and match CPU architectures from different vendors, but the practical reality of such workloads was always niche. Furthermore, silicon vendors found that proprietary chipsets allowed them to innovate at their own pace, independent of the slow-moving committees of standards bodies. By embedding these interconnects directly into the CPUs, they could differentiate their products and lock in their ecosystems.

However, the explosive rise of generative AI and large-scale model training has reignited the push for standardized "scale-up" networking. Today, the focus has shifted from CPUs to GPUs and specialized accelerators (XPUs). While the players have changed, the fundamental economic tension remains: the industry craves competition to drive down costs, while the market leader, Nvidia, continues to reap the rewards of a highly optimized, proprietary stack.

Nvidia’s dominance is currently anchored by its NVLink and NVSwitch technologies. These proprietary ports and switches offer unparalleled bandwidth and ultra-low latency, enabling the company to glue together as many as 72 GPUs into a single shared-memory system known as the NVL72 rackscale machine. The premium Nvidia charges for this "scale-up" fabric is significant, reflecting the lack of viable alternatives. While Nvidia has recently shown a willingness to license NVLink ports through its NVLink Fusion effort—allowing custom CPUs and third-party XPUs to hook into its memory space—it has stopped short of allowing customers to build their own independent shared-memory systems using the NVLink protocol without buying Nvidia’s own silicon.

This landscape provides the backdrop for the emergence of Upscale AI, a startup that is rapidly becoming one of the most watched players in the AI infrastructure space. Since its Series A funding round in January, where it raised $200 million, Upscale AI has seen its total capital grow to $500 million, its valuation double to $2 billion, and its workforce swell to more than 300 employees. This week, the company’s leadership provided the most detailed look yet at its plans to disrupt the AI networking market with its "SkyHammer" scale-up switch ASIC.

The leadership team at Upscale AI brings a wealth of experience to the table. Co-founder and executive chairman Rajiv Khemani and CEO Barun Kar are veterans of the high-performance networking industry, and their strategy reflects a deep understanding of where the current bottlenecks in AI clusters lie.

While specific "speeds and feeds" for the SkyHammer ASIC remain closely guarded, the company has revealed that the chip will boast an aggregate bandwidth of 115.2 Tb/sec. This figure places SkyHammer on equal footing with the most advanced scale-out network ASICs currently offered by industry titans like Broadcom, Cisco Systems, and Nvidia. Upscale AI’s SkyFabriX architecture is designed to scale even further, with plans for switch gear that can handle multiple petabits per second of aggregate bandwidth.

Achieving these petabit-scale speeds will likely involve ganging multiple SkyHammer ASICs together within a single switch chassis. This is a proven technique in the networking world; by using a multi-tier internal fabric—often involving specialized fabric connectors similar to the "Ramon" devices used with Broadcom’s Jericho ASICs—manufacturers can double or quadruple the effective bandwidth per port. While this approach can increase latency due to additional internal "hops," it allows for the creation of massive, high-density switches that are more cost-effective than developing a single, gargantuan ASIC.

In terms of scalability, the SkyHammer architecture is designed to support up to 576 accelerators in a single networking tier. By utilizing multiple tiers, Upscale AI claims the fabric can scale to "thousands of accelerators." This puts the company in direct competition with the UALink consortium, which is aiming for 1,024 XPUs in a single tier, and Nvidia’s future "Vera-Rubin" generation, which targets 1,152 GPUs across a multi-tier NVSwitch fabric.

A closer look at the mathematics of SkyHammer’s bandwidth reveals an interesting strategic choice. At a scale of 576 devices, each device would receive approximately 200 Gb/sec of bandwidth. While this is a formidable figure, it is considerably lower than the 1.8 TB/sec offered by Nvidia’s NVSwitch 5 generation in the Blackwell NVL72 systems. When normalized, SkyHammer’s bandwidth per port at a 72-XPU scale is roughly one-sixth that of Nvidia’s current top-tier offering.

However, Upscale AI argues that raw bandwidth is not the only metric that matters, particularly for AI inference workloads. In the world of token generation, predictable latency and the elimination of "jitter" (variance in latency) are often more critical than peak throughput. Arvind Srikumar, senior vice president of product and marketing at Upscale AI, emphasizes that the SkyHammer ASIC was built from a "clean sheet of paper" specifically to address these needs.

"With AI, the latency has to be super predictable, and we have built into the ASIC predictable jitter," Srikumar explained. He noted that while standard Ethernet fabrics are often fixed-pipeline arrangements with limited parallelism, SkyHammer employs a more parallel architecture to minimize latency and ensure a 100 percent lossless fabric. This approach is intended to provide the reliability required for scale-up memory domains without the overhead of traditional Ethernet retrofitting.

Interestingly, SkyHammer is designed to run UALink over Ethernet (UALoE) and the ESUN memory protocols. This confirms that, beneath its specialized AI features, SkyHammer remains an Ethernet-based ASIC. This choice aligns with a broader industry trend where Ethernet is being optimized to challenge InfiniBand’s long-standing dominance in high-performance environments. While InfiniBand still holds the crown for absolute lowest port-to-port hop latency, the Ultra Ethernet Consortium and companies like Upscale AI are betting that Ethernet’s superior scalability and cost-effectiveness will eventually make it the standard for the vast majority of AI clusters.

Upscale AI’s strategy also involves a nuanced relationship with Nvidia. The startup has selected Nvidia’s Spectrum-X Ethernet switches as its preferred platform for scale-out fabrics. Upscale AI plans to acquire Spectrum-X ASICs and build its own scale-out switches, porting its SkyOS network operating system to run on them. SkyOS itself is an AI-optimized evolution of SONiC (Software for Open Networking in the Cloud), the open-source operating system originally developed by Microsoft that has become a de facto standard in hyperscale datacenters.

By spanning both scale-up and scale-out networks with a single operating system and orchestration tool (SkyCMD), Upscale AI aims to give customers a unified view of their entire AI infrastructure. This would theoretically allow a datacenter architect to mix and match CPUs, GPUs, and XPUs from different vendors, all managed through a single software stack.

The primary hurdle for this vision remains Nvidia’s closed ecosystem. As of now, there is no path for Nvidia GPUs to participate in a scale-up domain managed by SkyHammer or any other non-Nvidia fabric. Nvidia has every incentive to keep its NVSwitch environment proprietary to maintain its high margins. However, other players in the market, most notably AMD, are likely looking at companies like Upscale AI as essential partners. AMD’s strategy relies on open standards like UALink and ESUN, and some industry observers suggest that AMD might eventually seek to acquire a company like Upscale AI to secure its own scale-up networking intellectual property.

As the industry moves toward the next generation of AI hardware—Nvidia’s Rubin and AMD’s future MI-series accelerators—the battle over the interconnect will only intensify. Nvidia could potentially counter the threat of standardized fabrics by increasing the radix of its NVSwitch ASICs to flatten its networks, though this would likely require a trade-off in per-port bandwidth. Alternatively, if the market for AI inference continues to shift toward standardized protocols, Nvidia might eventually find it more profitable to port its own protocols to high-radix switches like SkyHammer.

For now, Upscale AI is positioning itself as the bridge between the proprietary past and a more open, competitive future for AI infrastructure. With $500 million in the bank and a clean-sheet silicon design, the company is betting that the law of economic substitution will eventually break down even the strongest of proprietary walls.