Upscale AI Unveils SkyHammer Fabric to Challenge Nvidia’s Dominance in Scale-Up AI Networking

The history of high-performance computing has long been defined by a tension between proprietary innovation and the industry’s desire for open standards. For decades, every major CPU manufacturer maintained its own highly guarded method for linking multiple processors into shared memory clusters. Whether it was the specialized interconnects used by IBM, Intel, or AMD, these technologies served as the "universal glue" that allowed several independent chips to function as a single, massive computational unit. Despite the efforts of various industry groups, such as the CCIX and CXL consortia, to create a standardized fabric for this purpose, the market largely remained fragmented.

The failure to establish a truly universal standard for Symmetric Multiprocessing (SMP) and Non-Uniform Memory Access (NUMA) was driven by two primary factors. First, while customers appreciated the idea of interoperability, the actual demand for mixing and matching different CPU architectures from different vendors within a single shared-memory system was remarkably low. Second, and perhaps more importantly, proprietary control allowed vendors to innovate at their own pace. They could refine their SMP and NUMA chipsets—technologies that eventually moved from external components directly onto the CPU die—without waiting for a standards body to ratify new features. This independence allowed for rapid differentiation, but it also cemented vendor lock-in.

Today, as the industry pivots from general-purpose CPU computing to AI-centric GPU and XPU architectures, the same battle for the "scale-up" network is being waged. While "scale-out" networking—the traditional Ethernet or InfiniBand used to connect thousands of nodes—is well-understood, "scale-up" networking refers to the high-speed, low-latency interconnects that allow GPUs within a rack to share memory and work on a single large model as if they were one giant processor. Currently, Nvidia sits at the center of this universe with its NVLink and NVSwitch technologies, charging a significant premium for the privilege of unparalleled bandwidth and latency.

However, the industry’s "hope springs eternal" regarding standards, driven by the economic law of substitution. Markets naturally crave competition to drive down costs. This environment has provided the perfect backdrop for the emergence of Upscale AI, a startup that is rapidly gaining momentum as it attempts to break the proprietary stranglehold on AI scale-up fabrics.

The Rise of Upscale AI and the SkyHammer Architecture

Upscale AI first caught the industry’s attention earlier this year when it announced a significant $200 million Series A funding round. Since then, the company’s trajectory has been nothing short of explosive. The firm has now raised a total of $500 million, its valuation has surged to $2 billion, and its workforce has expanded to more than 300 employees. This week, the company’s leadership, including co-founder and executive chairman Rajiv Khemani and CEO Barun Kar, provided a deeper look into their technical roadmap and the "SkyHammer" scale-up switch ASIC that has been under development for several years.

Khemani and Kar are industry veterans with extensive backgrounds in high-performance systems and networking, and their strategy reflects a "clean sheet" approach to the challenges of modern AI workloads. The centerpiece of their offering is the SkyHammer ASIC, which boasts an aggregate bandwidth of 115.2 Tb/sec. This figure places Upscale AI on a level playing field with the state-of-the-art scale-out network ASICs produced by industry titans like Broadcom, Cisco Systems, and Nvidia.

The SkyHammer chips are designed to power the "SkyFabriX" architecture, which Upscale AI claims will eventually support switch gear capable of reaching multiple petabits per second of aggregate bandwidth. Achieving such massive scale typically involves ganging multiple ASICs together within a single switch. This is a common practice for companies like Broadcom and Meta, where a two-tier internal network within a switch can double port bandwidth, albeit at the cost of increased latency for some port hops. Upscale AI appears poised to follow a similar path, optimizing the economics of port density and bandwidth to provide a competitive alternative to the status quo.

Scaling the Memory Domain: Bandwidth vs. Predictability